Field Programmable Gate Arrays (FPGA) offer many advantages to the designers of systems, including high predictability in terms of resource usage and the ability to process certain (parallel) functions and data streams efficiently and quickly. To date an impediment against the use of FPGA in safety critical domains has been a lack of appropriate fault tolerance techniques. This has resulted in FPGAs having been used mainly in lower criticality systems often with rudimentary and inefficient fault tolerance schemes, e.g. triple-modular redundancy.